Hi,

On Thu, Feb 27, 2014 at 11:57:44AM -0800, Loc Ho wrote:
> > On Thu, Feb 27, 2014 at 11:14:05AM -0700, Loc Ho wrote:
> >> This patch adds function set_speed to the generic PHY framework operation
> >> structure. This function can be called to instruct the PHY underlying layer
> >> at specified lane to configure for specified speed in hertz.
> >
> > why ? looks like clk_set_rate() is your friend here. Can you be more
> > descriptive of the use case ? When will this be used ?
> >
> 
> The phy_set_speed is used to configure the operation speed of the PHY
> at run-time. The clock interface in general is used to configure the
> clock input to the IP. I don't believe they are the same thing. Maybe
> it will be clear in my response to your second email

The problem with this is that you end up adding SATA-specific details to
something which is supposed to be generic. After negoatiation, don't you
get any interrupt from your PHY indicating that link speed negotiation
is done ? Or is that IRQ only on AHCI IP ?


cheers

-- 
balbi

Attachment: signature.asc
Description: Digital signature

Reply via email to