Hi Chanwoo,
On 11.03.2014 08:54, Chanwoo Choi wrote:
ARM CPU has its own performance profiling unit(PMU, Perforamnce Monitoring
Unit).
This patch add PMU dt data to support PMU which count cache hit and miss events.
PMU interrput list of Exynos4212
- <2 2> : INTG2[2] - PMUIRQ[0] for CPU0
- <3 2> : INTG3[2] - PMUIRQ[1] for CPU1
PMU interrput list of Exynos4412
- <2 2> : INTG2[2], PMUIRQ[0] for CPU0
- <3 2> : INTG3[2], PMUIRQ[1] for CPU1
- <18 2> : INTG18[2], PMUIRQ[2] : CPU2
- <19 2> : INTG19[2], PMUIRQ[3] : CPU3
Signed-off-by: Chanwoo Choi <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
---
arch/arm/boot/dts/exynos4x12.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
Reviewed-by: Tomasz Figa <[email protected]>
Best regards,
Tomasz
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