Paul Mackerras <[EMAIL PROTECTED]> wrote: > > POWER5 machines have a per-hardware-thread register which counts at a > rate which is proportional to the percentage of cycles on which the > cpu dispatches an instruction for this thread (if the thread gets all > the dispatch cycles it counts at the same rate as the timebase > register). This register is also context-switched by the hypervisor. > Thus it gives a fine-grained measure of the actual cpu usage by the > thread over time. > > This patch adds code to read this register every timer interrupt and > on every context switch.
fyi: This patch consumes another entry from thread_struct.pad[]. ppc64-implement-a-vdso-and-use-it-for-signal-trampoline.patch consumes two more entries, so with both patches, you have none left. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
