On Sat, Mar 22, 2014 at 10:16 AM, Kees Cook <keesc...@chromium.org> wrote: > On non-LPAE ARMv6+, read-only PMD bits are defined with the combination > "PMD_SECT_APX | PMD_SECT_AP_WRITE". Adjusted the bit masks to correctly > report this. > > Signed-off-by: Kees Cook <keesc...@chromium.org> > --- > v3: > - check for pre-v6 CPUs on the page table report. > v2: > - reorder bits, suggested by Olof. > --- > arch/arm/mm/dump.c | 31 +++++++++++++++++++++++++------ > 1 file changed, 25 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c > index ef69152f9b52..c1122d266c45 100644 > --- a/arch/arm/mm/dump.c > +++ b/arch/arm/mm/dump.c > @@ -121,23 +121,42 @@ static const struct prot_bits pte_bits[] = { > > static const struct prot_bits section_bits[] = { > #ifndef CONFIG_ARM_LPAE > - /* These are approximate */ > +# if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || > defined(CONFIG_CPU_V7)
You can simplify the ifdef logic like this: #ifdef CONFIG_ARM_LPAE /* Implies v7 */ #elif __LINUX_ARM_ARCH__ >= 6 #else /* v4/v5 */ #endif -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/