iwmmxt.S requires special treatment of coprocessor access registers for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops down to XScale-based treatment on all other architectures.
As some PJ4B also come with iWMMXt and also need PJ4 treatment, rework the corresponding preprocessor directives to explicitly check for supported architectures and fail on unsupported ones. Signed-off-by: Sebastian Hesselbarth <[email protected]> --- Cc: Russell King <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Olof Johansson <[email protected]> Cc: Kevin Hilman <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Eric Miao <[email protected]> Cc: Haojian Zhuang <[email protected]> Cc: Chao Xie <[email protected]> Cc: [email protected] Cc: [email protected] --- arch/arm/kernel/iwmmxt.S | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index a08783823b32..2452dd1bef53 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -19,12 +19,16 @@ #include <asm/thread_info.h> #include <asm/asm-offsets.h> -#if defined(CONFIG_CPU_PJ4) +#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) #define PJ4(code...) code #define XSC(code...) -#else +#elif defined(CONFIG_CPU_MOHAWK) || \ + defined(CONFIG_CPU_XSC3) || \ + defined(CONFIG_CPU_XSCALE) #define PJ4(code...) #define XSC(code...) code +#else +#error "Unsupported iWMMXt architecture" #endif #define MMX_WR0 (0x00) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
