On Wed, Apr 16, 2014 at 02:17:08PM -0700, H. Peter Anvin wrote: > On 04/16/2014 12:03 PM, Marcelo Tosatti wrote: > >> @@ -3550,9 +3550,9 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu > >> *vcpu, > >> break; > >> case PT64_ROOT_LEVEL: > >> context->rsvd_bits_mask[0][3] = exb_bit_rsvd | > >> - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); > >> + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7); > >> context->rsvd_bits_mask[0][2] = exb_bit_rsvd | > >> - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); > >> + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7); > > > > Bit 7 is not reserved either, for the PDPTE (its PageSize bit). > > > > In long mode (IA-32e), bit 7 is definitely reserved. > > -hpa
There is a separate reserved mask for PS=1, nevermind. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
