On Mon, Apr 14, 2014 at 4:22 PM, Masami Hiramatsu <masami.hiramatsu...@hitachi.com> wrote: > (2014/04/11 21:23), Denys Vlasenko wrote: >> On Fri, Apr 11, 2014 at 5:03 AM, Masami Hiramatsu >> <masami.hiramatsu...@hitachi.com> wrote: >>> At least, if we can trust Intel SDM, it says that depends >>> on the operand-size (insn->opnd_bytes) and stack segment >>> descriptor. Please check the SDM vol.1 6.2.2 Stack Alignment >>> and vol.2a, 3.2 Instructions (A-M), CALL--Call Procedure. >>> But we'd better check it on x86-32. >> >> I am past trusting CPU manuals on this one: >> >> By now I verified on the real hardware that AMD and Intel CPUs >> handle this insn differently in 64-bit mode: Intel ignores 0x66 prefix. >> AMD treats this insn the same as in 32-bit mode: as 16-bit insn. >> >> (Should I submit a patch adding comment about it >> in x86-opcode-map.txt?) > > Yeah, feel free to do so :)
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