Mixer hardware supports offsetting dma from start of source buffer using
the MXR_GRP_SXY register.
Signed-off-by: Daniel Kurtz <djku...@chromium.org>
---
drivers/gpu/drm/exynos/exynos_mixer.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 475eb49..40cf39b 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -529,13 +529,11 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
int win)
dst_x_offset = win_data->crtc_x;
dst_y_offset = win_data->crtc_y;
+ src_x_offset = win_data->fb_x;
+ src_y_offset = win_data->fb_y;
/* converting dma address base and source offset */
- dma_addr = win_data->dma_addr
- + (win_data->fb_x * win_data->bpp >> 3)
- + (win_data->fb_y * win_data->fb_width * win_data->bpp >> 3);
- src_x_offset = 0;
- src_y_offset = 0;
+ dma_addr = win_data->dma_addr;
if (win_data->scan_flags & DRM_MODE_FLAG_INTERLACE)
ctx->interlace = true;
--
1.9.1.423.g4596e3a
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