> Another explanation is that because we ACK the NMI early, we leave the
> door open to other interrupts, incl. NIC, and we are interrupting the 
> execution

PMI executes with interrupts off.

> of the PMU IRQ handler, yet that detour is measured in the PMU handler
> latency, causing more throttling than needed. Is that a plausible scenario 
> too?
> And if so, I think we need to narrow the window for timing errors, by
> acking late
> on all processors and not just HSW.

If you think there's a concrete problem please show an ftrace.

-Andi
-- 
[email protected] -- Speaking for myself only
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