On Fri, 2014-06-06 at 08:55 -0700, Davidlohr Bueso wrote: > PA-RISC's cmpxchg is not save against normal stores and the code used > for optimistic spinning is known broken because of this.
What about all the other identified architectures? The problem is that unless you can do an atomic Read Modify Write on your architecture, you have to implement our exchange primitives with locking, and that makes you unsafe against stores We happen to be the architecture that detected this, but I thought we agreed sparc32, metag, tile32, arc and possibly hexagon have this problem. Rather than naming all the failing architectures, we probably want an ARCH_NO_ATOMIC_RMW symbol which they select to indicate they can't do atomic exchange and then you make depends on SMP && RWSEM_XCHGADD_ALGORITHM &!ARCH_NO_ATOMIC_RMW So they can all self select (especially if more come crawling out of the woodwork). James -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
