On 06/06/14 07:03, Stephane Viau wrote:
> The clock driver usually complains when a clock is being prepared
> before setting its rate. It is the case here for "core_clk" which
> needs to be set at 19.2 MHz before we attempt a prepare_enable().

That's only true in the downstream vendor kernel. Upstream we detect all
rates when clocks are registered. Given that 19.2Mhz is the default rate
out of reset for this clock this patch is fairly useless.

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