On 05/29/2014 09:38 AM, Kishon Vijay Abraham I wrote:
From: Keerthy <j-keer...@ti.com>
Add divider table to optfclk_pciephy_div clock. The Documentation
for divider clock can be found at ../clock/ti/divider.txt
This patch requires a better changelog. Why is the change done, any TRM
refs etc.?
-Tero
Cc: Rajendra Nayak <rna...@ti.com>
Cc: Tero Kristo <t-kri...@ti.com>
Cc: Paul Walmsley <p...@pwsan.com>
Signed-off-by: Keerthy <j-keer...@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kis...@ti.com>
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index c767687..55e95c5 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1170,6 +1170,7 @@
clocks = <&apll_pcie_ck>;
#clock-cells = <0>;
reg = <0x021c>;
+ ti,dividers = <2>, <1>;
ti,bit-shift = <8>;
ti,max-div = <2>;
};
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