On Tue, 26 Aug 2014, Xiubo Li wrote:
> Since the Flextimer device will be implemented in BE mode on
> LS1 SoC, and in LE mode on Vybrid, LS2 SoCs, so here we need
> the endianness judgment before doing the mmio.
Brilliant. So for every clocksource read you take a conditional.
> @@ -238,7 +243,7 @@ static int __init ftm_clocksource_init(unsigned long freq)
> sched_clock_register(ftm_read_sched_clock, 16, freq / (1 << priv->ps));
> err = clocksource_mmio_init(priv->clksrc_base + FTM_CNT, "fsl-ftm",
> freq / (1 << priv->ps), 300, 16,
> - clocksource_mmio_readl_up);
> + ftm_clocksource_read_up);
What's wrong with having endianess aware clocksource_mmio functions
and make the decision at init time?
Thanks
tglx
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