Hello.
On 09/05/2014 01:03 PM, Geert Uytterhoeven wrote:
Add RCAN clock support to the R-Car generation 2 CPG driver. This clock
gets
derived from the USB_EXTAL clock by dividing it by 6. The layout of
RCANCKCR
register is close to those of the clocks supported by the 'clk-div6'
driver
but has no divider field, and so can't be supported by that driver...
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
The patch is against the 'clk-next' branch of Mike Turquette's 'linux.git'
repo.
drivers/clk/shmobile/clk-rcar-gen2.c | 99
+++++++++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
More than a months has passed, there hasn't been any feedback, patch
hasn't been applied... what's wrong with it?
Sorry for missing this, it went under my radar.
I'm not a clock expert (pulling in Laurent), but it looks fine to me.
I'm just wondering whether you can simplify the code by using clk-gate?
The gated clocks inherit their clock rate from the parent, while the RCAN
clock has a fixed divisor (6). I'm gonna look into composite clocks instead.
Gr{oetje,eeting}s,
Geert
WBR, Sergei
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