This patch fixes I-cache invalidation operation for M32102 chip,
which is one of m32r MMU-less targets.

Before this fix, the m32r kernel for M32102 chip missed I-cache
invalidation operation and switched off I-cache unintentionally.
This bug caused awful performance degradation.

Signed-off-by: Mamoru Sakugawa <[EMAIL PROTECTED]>
Signed-off-by: Hirokazu Takata <[EMAIL PROTECTED]>
---

diff -ruNp a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c
--- a/arch/m32r/mm/cache.c      2004-12-25 06:35:50.000000000 +0900
+++ b/arch/m32r/mm/cache.c      2005-03-10 21:43:07.708321535 +0900
@@ -4,8 +4,6 @@
  *  Copyright (C) 2002  Hirokazu Takata
  */
 
-/* $Id$ */
-
 #include <linux/config.h>
 #include <asm/pgtable.h>
 
@@ -25,8 +23,8 @@
 #define MCCR_DCACHE_CBINV      (MCCR_CC|MCCR_DIV|MCCR_DCB)
 #define CHECK_MCCR(mccr)       (mccr = *MCCR)
 #elif defined(CONFIG_CHIP_M32102)
-#define MCCR           ((volatile unsigned long*)0xfffffffc)
-#define MCCR_IIV       (1UL << 8)      /* I-cache invalidate */
+#define MCCR           ((volatile unsigned char*)0xfffffffe)
+#define MCCR_IIV       (1UL << 0)      /* I-cache invalidate */
 #define MCCR_ICACHE_INV                MCCR_IIV
 #endif /* CONFIG_CHIP_XNUX2 || CONFIG_CHIP_M32700 */
 
@@ -65,4 +63,3 @@ void _flush_cache_copyback_all(void)
 
 #endif
 }
-

--
Hirokazu Takata <[EMAIL PROTECTED]>
Linux/M32R Project:  http://www.linux-m32r.org/
-
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