Commit-ID: d86c8eaf95700d932bdfa8a4f7b4e6d28949fd84 Gitweb: http://git.kernel.org/tip/d86c8eaf95700d932bdfa8a4f7b4e6d28949fd84 Author: Andi Kleen <[email protected]> AuthorDate: Tue, 2 Sep 2014 11:44:12 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Wed, 24 Sep 2014 14:48:16 +0200
perf/x86/intel: Document all Haswell models Add names for each Haswell model as requested by Peter. Signed-off-by: Andi Kleen <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]> --- arch/x86/kernel/cpu/perf_event_intel.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index f962e26..7c9f78e 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -2540,10 +2540,10 @@ __init int intel_pmu_init(void) break; - case 60: /* 22nm Haswell */ - case 63: - case 69: - case 70: + case 60: /* 22nm Haswell Core */ + case 63: /* 22nm Haswell Server */ + case 69: /* 22nm Haswell ULT */ + case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */ x86_pmu.late_ack = true; memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, sizeof(hw_cache_extra_regs)); -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
