On Wed, Oct 01, 2014 at 10:21:48AM -0700, Soren Brinkmann wrote: > Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard > provides an AXI interface to dynamically reconfigure the clocking > resources of Xilinx FPGAs.
Why not just do the few things you have on the TODO list and get it merged to the "proper" part of the kernel, keeping it out of the staging tree? thanks, greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
