On 10/10, Peter De Schrijver wrote: > > > drivers/clk/tegra/clk-pll.c:732: unsigned long input_rate = > > > clk_get_rate(clk_get_parent(hw->clk)); > > > drivers/clk/tegra/clk-pll.c:1288: unsigned long input_rate = > > > clk_get_rate(clk_get_parent(hw->clk)); > > This is not so easy to change unfortunately. I will have to think of a > solution. >
Thanks. Does the input parent rate change at runtime or is it fixed at boot? I'm hoping we can call _get_table_rate() once before we register the clock or something. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
