>This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.
>For Micron SPI NOR flash, enabling or disabling quad I/O protocol is >controlled by >EVCR (Enhanced Volatile Configuration Register), Quad I/O protocol bit 7. >When EVCR bit 7 is reset to 0, the SPI NOR flash will operate in quad I/O mode. >Signed-off-by: bean huo <[email protected]> >Acked-by: Marek Vasut <[email protected]> Hi,Brian Is this patch OK? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
