On all supported SoCs, the kernel will be built with CONFIG_CPU_BIG_ENDIAN
iff the CPU is running in BE mode. Leverage this fact to autodetect
the MMIO byte ordering to use in generic-chip.c.
Signed-off-by: Kevin Cernekee <cerne...@gmail.com>
---
drivers/irqchip/Kconfig | 2 ++
drivers/irqchip/irq-bcm7120-l2.c | 9 ++++++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index afdc1f3..db44694 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -51,11 +51,13 @@ config ATMEL_AIC5_IRQ
config BCM7120_L2_IRQ
bool
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_CHIP_BE
select IRQ_DOMAIN
config BRCMSTB_L2_IRQ
bool
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_CHIP_BE
select IRQ_DOMAIN
config DW_APB_ICTL
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index e53a3a6..5324249 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -132,7 +132,7 @@ int __init bcm7120_l2_intc_of_init(struct device_node *dn,
const __be32 *map_mask;
int num_parent_irqs;
int ret = 0, len;
- unsigned int idx, irq;
+ unsigned int idx, irq, flags;
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
@@ -195,9 +195,12 @@ int __init bcm7120_l2_intc_of_init(struct device_node *dn,
goto out_unmap;
}
+ flags = IRQ_GC_INIT_MASK_CACHE;
+ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
+ flags |= IRQ_GC_BE_IO;
+
ret = irq_alloc_domain_generic_chips(data->domain, IRQS_PER_WORD, 1,
- dn->full_name, handle_level_irq, clr, 0,
- IRQ_GC_INIT_MASK_CACHE);
+ dn->full_name, handle_level_irq, clr, 0, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
--
2.1.1
--
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