On the Colibri module, the RMII clock for the Ethernet PHY is
generated by the SoC. This patch adds that missing pin to the
pinctrl of FEC1. Because the boot loader initializes this pin,
ethernet worked even without this pin so far.
Signed-off-by: Stefan Agner <ste...@agner.ch>
---
arch/arm/boot/dts/vf-colibri.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi
b/arch/arm/boot/dts/vf-colibri.dtsi
index 82f5728..95b6ff2 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -121,6 +121,7 @@
pinctrl_fec1: fec1grp {
fsl,pins = <
+ VF610_PAD_PTA6__RMII_CLKOUT 0x30d2
VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
--
2.1.3
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