On Thu, Dec 18, 2014 at 09:05:30PM +0100, Boris Brezillon wrote: > The slow and system clock should never return a rate of zero, but this > might happen if the clocks property defined in the DT is referencing the > wrong clocks. > Prevent any division by zero from happening by testing the clk_freq value > before calling do_div. > > Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com> > --- > drivers/pwm/pwm-atmel-hlcdc.c | 6 ++++++ > 1 file changed, 6 insertions(+)
Applied, thanks. Thierry
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