>This patch adds code which enables Quad I/O mode on Micron SPI NOR flashes.
>For Micron SPI NOR flash, enabling or disabling quad I/O protocol can be done >By two methods, >which are to use EVCR(Enhanced Volatile Configuration Register) and the ENTER >QUAD I/O MODE command. >There is no difference between these two methods. Unfortunately, for some >Micron spi nor flashes, >there no ENTER Quad I/O command(35h),such as n25q064.But for all current >Micron spi nor, >if it support quad I/O mode, using EVCR definitely be supported. It is a >recommended method to >enable Quad I/O mode by EVCR, Quad I/O protocol bit 7.When EVCR bit 7 is reset >to 0,the SPI NOR flash will operate in quad I/O mode. >This patch has been tested on N25Q512A and MT25TL256BAA1ESF.Micron spi nor of >spi_nor_ids[] table all support this method. >Signed-off-by: bean huo <[email protected]> >Acked-by: Marek Vasut <[email protected]> >--- >v1-v2: > Modified to that capture wait_till_ready() > return value,if error,directly return its > the value. > v2-v3: > Directly use the reurning error value of > read_reg and write_reg,instead of -EINVAL. > v3-v4: > Modify commit logs that wraped into 80 columns. > v4-v5: > Rebuild new patch based on latest linux-mtd. > v5-v6: > Rebuild patch based on latest l2-mtd. > add some comments. > Add SPI_NOR_QUAD_READ flag in the spi_nor_ids[] for Micron spi nor. > V6-v7: > Fixed up val with u8 in micron_quad_enable(). hi,maintainer how about this patch,it has been updated to V7. Please give some suggestions or if can be accepted? Thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
