On Thu, 8 Jan 2015, Joonsoo Kim wrote: > > You'd need a smp_wmb() in between tid and c in the loop then, which > > looks quite unpleasant. All in all disabling preemption isn't really > > that expensive, and you should redo your performance number if you go > > this way. > > This barrier() is not for read/write synchronization between cpus. > All read/write operation to cpu_slab would happen on correct cpu in > successful case. What I'd need to guarantee here is to prevent > reordering between fetching operation for correctness of algorithm. In > this case, barrier() seems enough to me. Am I wrong?
You are right. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
