On 01/12, Pratyush Anand wrote:
>
>
> On Friday 09 January 2015 11:29 PM, Oleg Nesterov wrote:
>> On 12/31, Pratyush Anand wrote:
>>>
>>> +int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct
>>> *mm,
>>> + unsigned long addr)
>>> +{
>>> + probe_opcode_t insn;
>>> +
>>> + insn = *(probe_opcode_t *)(&auprobe->insn[0]);
>>> +
>>> + switch (arm_probe_decode_insn(insn, &auprobe->ainsn)) {
>>> + case INSN_REJECTED:
>>> + return -EINVAL;
>>> +
>>> + case INSN_GOOD_NO_SLOT:
>>> + auprobe->simulate = true;
>>> + if (auprobe->ainsn.prepare)
>>> + auprobe->ainsn.prepare(insn, &auprobe->ainsn);
>>> + break;
>>> +
>>> + case INSN_GOOD:
>>> + default:
>>> + break;
>>> + }
>>> +
>>> + return 0;
>>> +}
>>
>> forgot to mention... shouldn't it also check IS_ALIGNED(addr,
>> AARCH64_INSN_SIZE) ?
>>
>> I do not know if unaligned insn address is valid on arm64 or not, but please
>
> AARCH64 instructions are always of fixed lenght ie 4 bytes. I do not see
> possibility of addr being unaligned. Please let me know, if I am missing
> something.
A user can write any offset into uprobe_events, and the generic code doesn't
check it is aligned.
>> note that at least it should not cross the page boundary, set_swbp() needs to
>> write AARCH64_INSN_SIZE == UPROBE_SWBP_INSN bytes and it assumes that this
>> should fit the single page.
>
> So, again I do not see the possibility of crossing of page boundary for
> any instruction address.
See above. So yes, it should really check IS_ALIGNED(AARCH64_INSN_SIZE).
Oleg.
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