On 15/01/15 06:06, Mark Brown wrote:
On Mon, Jan 12, 2015 at 01:14:00PM +1000, Ken Wilson wrote:
+- num-cs : The total number of chip selects used by this platform.
+ If unset, this defaults to 1.
So, this is intended to be the number of hardware chip selects that can
be configured but the first commit mentioned GPIOs as an option too so
we should at least say that this is specifically the controller
supported ones. However...
+#define ORION_SPI_CS_MASK 0x1C
+#define ORION_SPI_CS_SHIFT 2
+#define ORION_SPI_CS(cs) ((cs << ORION_SPI_CS_SHIFT) & \
+ ORION_SPI_CS_MASK)
...given that we have a fixed bitfield here which we know and doesn't
appear to depend on configuration do we even need this to be
configurable - given that we're going to need an explicit node for any
slave can't we just accept any sane chip select for a slave without
extending the binding?
The different implementations that use this driver (Marvell Kirkwood,
Armada 370/375) all
have a different number of supported chip selects, that fit into this
bit mask. There are also
multiple SPI controllers on each SoC which support different numbers of
chip selects.
For example, on the Armada 375, SPI0 supports 3 chip selects, while SPI1
only has 1.
I agree that we could support any sane chip select for a slave, since
the slave addresses do need
to be explicitly defined. I'm happy with whatever your preference is.
Thanks,
Ken
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