2015-01-24 22:24 GMT+03:00 Thomas Gleixner <t...@linutronix.de>: > On Sat, 24 Jan 2015, Dmitry Eremin-Solenikov wrote: > >> 2015-01-24 20:48 GMT+03:00 Thomas Gleixner <t...@linutronix.de>: >> > On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote: >> >> static void sa1100_mask_irq(struct irq_data *d) >> >> { >> >> - ICMR &= ~BIT(d->hwirq); >> >> + u32 reg; >> >> + unsigned long flags; >> >> + >> >> + raw_spin_lock_irqsave(&lock, flags); >> > >> > What's the exact point of that lock? And how is it related to the >> > $subject of the patch? >> >> It is needed to protect ICMR register during RMW cycle, isn't it? > > The original code has no protection for the RMW either. > > And there is a simple reason for this. These functions are guaranteed > to be called with interrupts disabled and this is a uniprocessor > machine and it will never grow SMP support. So interrupts disabled is > serialization enough.
OK, thanks for pointing. I'll update the patchset in a few days. -- With best wishes Dmitry -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/