> -----Original Message-----
> From: David Woodhouse [mailto:[email protected]]
> Sent: Wednesday, January 28, 2015 11:27 PM
> To: Wu, Feng
> Cc: [email protected]; [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]
> Subject: Re: [v3 04/26] iommu, x86: Implement irq_set_vcpu_affinity for
> intel_ir_chip
>
> On Fri, 2014-12-12 at 23:14 +0800, Feng Wu wrote:
> > Implement irq_set_vcpu_affinity for intel_ir_chip.
> >
> > Signed-off-by: Feng Wu <[email protected]>
> > Reviewed-by: Jiang Liu <[email protected]>
>
> Acked-by: David.Woodhouse <[email protected]> assuming a
> suitable answer to...
>
> > + vcpu_pi_info = (struct vcpu_data *)vcpu_info;
> > + memcpy(irte_pi, &ir_data->irte_entry, sizeof(struct irte));
> > +
> > + irte_pi->urg = 0;
> > + irte_pi->vector = vcpu_pi_info->vector;
> > + irte_pi->pda_l = (vcpu_pi_info->pi_desc_addr >>
> > + (32 - PDA_LOW_BIT)) & ~(-1UL << PDA_LOW_BIT);
> > + irte_pi->pda_h = (vcpu_pi_info->pi_desc_addr >> 32) &
> > + ~(-1UL << PDA_HIGH_BIT);
> > +
> > + irte_pi->__reserved_1 = 0;
> > + irte_pi->__reserved_2 = 0;
> > + irte_pi->__reserved_3 = 0;
> > + irte_pi->__reserved_4 = 0;
>
> .... do we need a barrier here before we set this bit?
Thanks a lot for your Ack, David!
I cannot find a reason why we need a barrier here, since 'irte_pi' is only a
local
variant here, the real operation to program hardware occurs in modify_irte(), in
which spin lock is acquired, this means the there is an implicit barrier there.
Thanks,
Feng
>
> > + irte_pi->pst = 1;
> > +
> > + modify_irte(&ir_data->irq_2_iommu, (struct irte *)irte_pi);
>
>
> --
> dwmw2
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