Hi Joe,
On 02/22/2015 03:53 AM, Joe Perches wrote:
> The seq_printf return value, because it's frequently misused,
> will eventually be converted to void.
>
> See: commit 1f33c41c03da ("seq_file: Rename seq_overflow() to
> seq_has_overflowed() and make public")
>
> Signed-off-by: Joe Perches <[email protected]>
> ---
> arch/microblaze/kernel/cpu/mb.c | 149
> ++++++++++++++++++++--------------------
> 1 file changed, 73 insertions(+), 76 deletions(-)
>
> diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
> index 7b5dca7..01ae077 100644
> --- a/arch/microblaze/kernel/cpu/mb.c
> +++ b/arch/microblaze/kernel/cpu/mb.c
> @@ -27,7 +27,6 @@
>
> static int show_cpuinfo(struct seq_file *m, void *v)
> {
> - int count = 0;
> char *fpga_family = "Unknown";
> char *cpu_ver = "Unknown";
> int i;
> @@ -48,91 +47,89 @@ static int show_cpuinfo(struct seq_file *m, void *v)
> }
> }
>
> - count = seq_printf(m,
> - "CPU-Family: MicroBlaze\n"
> - "FPGA-Arch: %s\n"
> - "CPU-Ver: %s, %s endian\n"
> - "CPU-MHz: %d.%02d\n"
> - "BogoMips: %lu.%02lu\n",
> - fpga_family,
> - cpu_ver,
> - cpuinfo.endian ? "little" : "big",
> - cpuinfo.cpu_clock_freq /
> - 1000000,
> - cpuinfo.cpu_clock_freq %
> - 1000000,
> - loops_per_jiffy / (500000 / HZ),
> - (loops_per_jiffy / (5000 / HZ)) % 100);
> -
> - count += seq_printf(m,
> - "HW:\n Shift:\t\t%s\n"
> - " MSR:\t\t%s\n"
> - " PCMP:\t\t%s\n"
> - " DIV:\t\t%s\n",
> - (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
> - (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
> - (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
> - (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
> -
> - count += seq_printf(m,
> - " MMU:\t\t%x\n",
> - cpuinfo.mmu);
> -
> - count += seq_printf(m,
> - " MUL:\t\t%s\n"
> - " FPU:\t\t%s\n",
> - (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
> - (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
> - (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
> - (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
> -
> - count += seq_printf(m,
> - " Exc:\t\t%s%s%s%s%s%s%s%s\n",
> - (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
> - (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
> - (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
> - (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
> - (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
> - (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
> - (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
> - (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
> -
> - count += seq_printf(m,
> - "Stream-insns:\t%sprivileged\n",
> - cpuinfo.mmu_privins ? "un" : "");
> + seq_printf(m,
> + "CPU-Family: MicroBlaze\n"
> + "FPGA-Arch: %s\n"
> + "CPU-Ver: %s, %s endian\n"
> + "CPU-MHz: %d.%02d\n"
> + "BogoMips: %lu.%02lu\n",
> + fpga_family,
> + cpu_ver,
> + cpuinfo.endian ? "little" : "big",
> + cpuinfo.cpu_clock_freq / 1000000,
> + cpuinfo.cpu_clock_freq % 1000000,
> + loops_per_jiffy / (500000 / HZ),
> + (loops_per_jiffy / (5000 / HZ)) % 100);
> +
> + seq_printf(m,
> + "HW:\n Shift:\t\t%s\n"
> + " MSR:\t\t%s\n"
> + " PCMP:\t\t%s\n"
> + " DIV:\t\t%s\n",
> + (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
> + (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
> + (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
> + (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
> +
> + seq_printf(m, " MMU:\t\t%x\n", cpuinfo.mmu);
> +
> + seq_printf(m,
> + " MUL:\t\t%s\n"
> + " FPU:\t\t%s\n",
> + (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
> + (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
> + (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
> + (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
> +
> + seq_printf(m,
> + " Exc:\t\t%s%s%s%s%s%s%s%s\n",
> + (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
> + (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
> + (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
> + (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
> + (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
> + (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
> + (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
> + (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
> +
> + seq_printf(m,
> + "Stream-insns:\t%sprivileged\n",
> + cpuinfo.mmu_privins ? "un" : "");
>
> if (cpuinfo.use_icache)
> - count += seq_printf(m,
> - "Icache:\t\t%ukB\tline length:\t%dB\n",
> - cpuinfo.icache_size >> 10,
> - cpuinfo.icache_line_length);
> + seq_printf(m,
> + "Icache:\t\t%ukB\tline length:\t%dB\n",
> + cpuinfo.icache_size >> 10,
> + cpuinfo.icache_line_length);
> else
> - count += seq_printf(m, "Icache:\t\tno\n");
> + x seq_puts(m, "Icache:\t\tno\n");
>
> if (cpuinfo.use_dcache) {
> - count += seq_printf(m,
> - "Dcache:\t\t%ukB\tline length:\t%dB\n",
> - cpuinfo.dcache_size >> 10,
> - cpuinfo.dcache_line_length);
> - seq_printf(m, "Dcache-Policy:\t");
> + seq_printf(m,
> + "Dcache:\t\t%ukB\tline length:\t%dB\n",
> + cpuinfo.dcache_size >> 10,
> + cpuinfo.dcache_line_length);
> + seq_puts(m, "Dcache-Policy:\t");
> if (cpuinfo.dcache_wb)
> - count += seq_printf(m, "write-back\n");
> + seq_puts(m, "write-back\n");
> else
> - count += seq_printf(m, "write-through\n");
> - } else
> - count += seq_printf(m, "Dcache:\t\tno\n");
> + seq_puts(m, "write-through\n");
> + } else {
> + seq_puts(m, "Dcache:\t\tno\n");
> + }
> +
> + seq_printf(m,
> + "HW-Debug:\t%s\n",
> + cpuinfo.hw_debug ? "yes" : "no");
>
> - count += seq_printf(m,
> - "HW-Debug:\t%s\n",
> - cpuinfo.hw_debug ? "yes" : "no");
> + seq_printf(m,
> + "PVR-USR1:\t%02x\n"
> + "PVR-USR2:\t%08x\n",
> + cpuinfo.pvr_user1,
> + cpuinfo.pvr_user2);
>
> - count += seq_printf(m,
> - "PVR-USR1:\t%02x\n"
> - "PVR-USR2:\t%08x\n",
> - cpuinfo.pvr_user1,
> - cpuinfo.pvr_user2);
> + seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
>
> - count += seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
> return 0;
> }Acked-by: Michal Simek <[email protected]> Do you want to add it to microblaze next branch? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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