* Andy Lutomirski <l...@amacapital.net> wrote:
> > I'm a big fan of simplifying things, but.
> >
> > SIMD registers were growing in x86, and they are going
> > to grow again, this time four-fold in Intel MIC: from
> > sixteen 256-bit registers to thirty two 512-bit
> > registers.
> >
> > That's 2 kbytes of data. Just moving this data out
> > to/from memory will take some time.
> >
> > And some people talk about 1024-bit registers
> > already...
> >
> > Let's not completely remove lazy FPU saving code just
> > yet. Maybe we'll be forced to reinstate it.
>
> I'd prefer a different partial solution: encourage
> everyone to clear the xstate before making syscalls
> (using e.g. vzeroall). In fact, maybe user code should
> aggressively clear newly-unused xstate.
Also, xstate has various compaction features and could grow
new ones in the future as well, should the xsave area
become overly sparse: see xstate_comp_*[] et al in
arch/x86/kernel/xsave.c.
This is the better, hardware driven, synchronous
alternative to lazy, async register state save/restore, as
it gets us similar benefits of not saving/restoring unused
space, but avoids any async trap overhead.
Also ... with more and wider vector CPU registers context
switches between different sets of registers are going to
be inevitably more expensive, no matter what.
Thanks,
Ingo
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