On 2015/2/26 23:14, Andy Lutomirski wrote: > On Wed, Feb 25, 2015 at 10:15 PM, Wang Nan <wangn...@huawei.com> wrote: >> X86_TRAP_NMI, X86_TRAP_DF and X86_TRAP_MC use their own stack. Those >> stacks are invalid until cpu_init() installs TSS. >> >> This patch moves setting of the 3 gates after cpu_init(). >> >> Signed-off-by: Wang Nan <wangn...@huawei.com> >> --- >> >> If I understand correctly, logically speaking the original code is >> incorrect. However, there is no real bug caused by it for serval years. >> I'm not sure whether this fix is practical or not. Fix them only for >> logical correctness. > > Acked-by: Andy Lutomirski <l...@amacapital.net> > > That being said, I'm pretty sure you're not fixing a bug here.
Agree. > Delivery of an exception with no handler is every bit as fatal as > delivery of an exception with a non-working IST handler. > Just curious: in original code, what will happen if an NMI or MC raises after 'set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);' and before cpu_init()? In my opinion, at that time the interrupt handler is set but IST is not ready. In addition, why it's never happened for real? Does it means NMI is possible to be disabled? Thank you! > --Andy > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
