On Wed, 2015-03-04 at 23:09 +0100, Ingo Molnar wrote: > * Toshi Kani <toshi.k...@hp.com> wrote: : > Hm, so I don't see where you set the proper x86 PAT table attributes > for the pmds. > > MTRR's are basically a legacy mechanism, the proper way to set cache > attribute is PAT and I don't see where this generic code does that, > but I might be missing something?
It's done by x86 code, not by this generic code. __ioremap_caller() takes page_cache_mode and converts it to pgprot_t using the PAT table attribute. It then calls this generic func, ioremap_page_range(). When creating a huge page mapping, pud_set_huge() and pmd_set_huge() handle the relocation of the PAT bit. Thanks, -Toshi -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
