On 8 March 2015 at 22:43, Kaixu Xia <[email protected]> wrote: > The judgement of configuration coresight-default-sink has been > removed from the framework. So just remove it from DT and bindings. > > Signed-off-by: Kaixu Xia <[email protected]> > --- > Documentation/devicetree/bindings/arm/coresight.txt | 1 - > arch/arm/boot/dts/hip04.dtsi | 1 - > arch/arm/boot/dts/omap3-beagle-xm.dts | 1 - > arch/arm/boot/dts/omap3-beagle.dts | 1 - > arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 1 - > 5 files changed, 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/coresight.txt > b/Documentation/devicetree/bindings/arm/coresight.txt > index a308935..88602b7 100644 > --- a/Documentation/devicetree/bindings/arm/coresight.txt > +++ b/Documentation/devicetree/bindings/arm/coresight.txt > @@ -61,7 +61,6 @@ Example: > compatible = "arm,coresight-etb10", "arm,primecell"; > reg = <0 0x20010000 0 0x1000>; > > - coresight-default-sink; > clocks = <&oscclk6a>; > clock-names = "apb_pclk"; > port { > diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi > index 2388145..44044f2 100644 > --- a/arch/arm/boot/dts/hip04.dtsi > +++ b/arch/arm/boot/dts/hip04.dtsi > @@ -275,7 +275,6 @@ > compatible = "arm,coresight-etb10", "arm,primecell"; > reg = <0 0xe3c42000 0 0x1000>; > > - coresight-default-sink; > clocks = <&clk_375m>; > clock-names = "apb_pclk"; > port { > diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts > b/arch/arm/boot/dts/omap3-beagle-xm.dts > index 25f7b0a..8cdca51 100644 > --- a/arch/arm/boot/dts/omap3-beagle-xm.dts > +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts > @@ -150,7 +150,6 @@ > compatible = "arm,coresight-etb10", "arm,primecell"; > reg = <0x5401b000 0x1000>; > > - coresight-default-sink; > clocks = <&emu_src_ck>; > clock-names = "apb_pclk"; > port { > diff --git a/arch/arm/boot/dts/omap3-beagle.dts > b/arch/arm/boot/dts/omap3-beagle.dts > index c792391..6d4c46b 100644 > --- a/arch/arm/boot/dts/omap3-beagle.dts > +++ b/arch/arm/boot/dts/omap3-beagle.dts > @@ -145,7 +145,6 @@ > compatible = "arm,coresight-etb10", "arm,primecell"; > reg = <0x5401b000 0x1000>; > > - coresight-default-sink; > clocks = <&emu_src_ck>; > clock-names = "apb_pclk"; > port { > diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts > b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts > index 33920df..7a2aeac 100644 > --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts > +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts > @@ -362,7 +362,6 @@ > compatible = "arm,coresight-etb10", "arm,primecell"; > reg = <0 0x20010000 0 0x1000>; > > - coresight-default-sink; > clocks = <&oscclk6a>; > clock-names = "apb_pclk"; > port { > -- > 1.8.5.5 >
Applied - with a slight modification of the commit log. Thanks, Mathieu -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
