This patch converts the code to use rational best approximation algorithm which
is more precise.

Suggested-by: Stephen Boyd <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
---
 drivers/clk/Kconfig                  |  1 +
 drivers/clk/clk-fractional-divider.c | 38 +++++++++++++++++++++---------------
 2 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 0b474a0..3a1b1dc 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -14,6 +14,7 @@ config COMMON_CLK
        select HAVE_CLK_PREPARE
        select CLKDEV_LOOKUP
        select SRCU
+       select RATIONAL
        ---help---
          The common clock framework is a single definition of struct
          clk, useful across many platforms, as well as an
diff --git a/drivers/clk/clk-fractional-divider.c 
b/drivers/clk/clk-fractional-divider.c
index 23a56a0..f060be8 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -7,13 +7,14 @@
  *
  * Adjustable fractional divider clock implementation.
  * Output rate = (m / n) * parent_rate.
+ * Uses rational best approximation algorithm.
  */
 
 #include <linux/clk-provider.h>
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/slab.h>
-#include <linux/gcd.h>
+#include <linux/rational.h>
 
 #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
 
@@ -47,23 +48,29 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
 }
 
 static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
-                             unsigned long *prate)
+                             unsigned long *parent_rate)
 {
        struct clk_fractional_divider *fd = to_clk_fd(hw);
-       unsigned maxn = clk_div_mask(fd->nwidth) + 1;
-       unsigned div;
+       unsigned long scale;
+       unsigned long m, n;
+       u64 ret;
 
-       if (!rate || rate >= *prate)
-               return *prate;
+       if (!rate || rate >= *parent_rate)
+               return *parent_rate;
 
-       div = gcd(*prate, rate);
+       /* Get rate closer to *parent_rate */
+       scale = fls_long(*parent_rate / rate - 1);
+       if (scale > fd->nwidth)
+               rate <<= scale - fd->nwidth;
 
-       while ((*prate / div) > maxn) {
-               div <<= 1;
-               rate <<= 1;
-       }
+       rational_best_approximation(rate, *parent_rate,
+                       clk_div_mask(fd->mwidth), clk_div_mask(fd->nwidth),
+                       &m, &n);
 
-       return rate;
+       ret = (u64)*parent_rate * m;
+       do_div(ret, n);
+
+       return ret;
 }
 
 static void clk_fd_update(struct clk_fractional_divider *fd,
@@ -82,12 +89,11 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long 
rate,
 {
        struct clk_fractional_divider *fd = to_clk_fd(hw);
        unsigned long flags;
-       unsigned long div;
        unsigned long m, n;
 
-       div = gcd(parent_rate, rate);
-       m = rate / div;
-       n = parent_rate / div;
+       rational_best_approximation(rate, parent_rate,
+                       clk_div_mask(fd->mwidth), clk_div_mask(fd->nwidth),
+                       &m, &n);
 
        if (fd->lock) {
                spin_lock_irqsave(fd->lock, flags);
-- 
2.1.4

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