On Thu, Apr 16, 2015 at 09:02:08PM +0200, Peter Zijlstra wrote:
> On Thu, Apr 16, 2015 at 08:24:27PM +0200, Ingo Molnar wrote:
> > Yes ... but that still leaves this weird feeling that it's really
> > still a bit wrong because it's not proper parallel code, we just
> > reduced the probability of the remaining races radically. And it's not
> > like GCC (or any compiler) does load tearing or even store tearing
> > under normal -O2 for such code patterns, right?
>
> I think Paul once caught GCC doing something silly, but typically no.
> The re-loads however have been frequently observed.
Too true!
Some architectures do split stores of constants. For example, given
an architecture with a store-immediate instruction with (say) a four-bit
immediate field, gcc can compile this:
x = 0x00020008;
to something like:
st $2, (x+2)
st $8, (x)
And gcc was doing this even though the store to x had volatile semantics,
a bug which has thankfully since been fixed.
But then again, I am paranoid. So I would not put it past gcc to think
to itself "Hmmm... I just loaded x a few instructions back, and only
clobbered the low-order byte. So I will just reload that byte into
low-order byte of the register containing the remnants of the previous
load."
No, I have never seen gcc do that, but a C compiler could do that and
still claim to be complying with the standard. :-/
Thanx, Paul
> > > And its not like they really cost anything.
> >
> > That's true.
> >
> > Would it make sense to add a few comments to the seq field definition
> > site(s), about how it's supposed to be accessed - or to the
> > READ_ONCE()/WRITE_ONCE() sites, to keep people from wondering?
>
> For sure, can do a comment no problem.
>
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