From: Marc Zyngier <marc.zyng...@arm.com>
3.12-stable review patch. If anyone has any objections, please let me know.
===============
commit 2d1d841bd44e24b58a3d3cc4fa793670aaa38fbf upstream.
In order to be able to support more than 4 A7 or A15 CPUs,
we need to fix the MPIDR computing to reflect the fact that
both A15 and A7 can only exist in clusters of at most 4 CPUs.
Fix the MPIDR computing to allow virtual clusters to be exposed
to the guest.
Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org>
Signed-off-by: Shannon Zhao <shannon.z...@linaro.org>
Signed-off-by: Jiri Slaby <jsl...@suse.cz>
---
arch/arm/kvm/coproc_a15.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/kvm/coproc_a15.c b/arch/arm/kvm/coproc_a15.c
index bbd4b888dbf3..8611c5c45d93 100644
--- a/arch/arm/kvm/coproc_a15.c
+++ b/arch/arm/kvm/coproc_a15.c
@@ -27,11 +27,13 @@
static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r)
{
/*
- * Compute guest MPIDR. No need to mess around with different clusters
- * but we read the 'U' bit from the underlying hardware directly.
+ * Compute guest MPIDR. We build a virtual cluster out of the
+ * vcpu_id, but we read the 'U' bit from the underlying
+ * hardware directly.
*/
- vcpu->arch.cp15[c0_MPIDR] = (read_cpuid_mpidr() & MPIDR_SMP_BITMASK)
- | vcpu->vcpu_id;
+ vcpu->arch.cp15[c0_MPIDR] = ((read_cpuid_mpidr() & MPIDR_SMP_BITMASK) |
+ ((vcpu->vcpu_id >> 2) << MPIDR_LEVEL_BITS) |
+ (vcpu->vcpu_id & 3));
}
#include "coproc.h"
--
2.3.5
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