Without the cacheline alignment, the readings will occasionally incorrectly
return 0.

Signed-off-by: Michael Welling <mwell...@ieee.org>
---
 drivers/iio/adc/mcp320x.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c
index efbfd12..46b98cf 100644
--- a/drivers/iio/adc/mcp320x.c
+++ b/drivers/iio/adc/mcp320x.c
@@ -60,7 +60,7 @@ struct mcp320x {
        struct spi_message msg;
        struct spi_transfer transfer[2];
 
-       u8 tx_buf;
+       u8 tx_buf ____cacheline_aligned;
        u8 rx_buf[2];
 
        struct regulator *reg;
-- 
1.7.9.5

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