On Sat, 9 May 2015, Paul Gortmaker wrote:

> This routine has been around for over a decade, but with EISA
> being dead and abandoned for about twice that long, the name can
> be kind of confusing.  The function is going at the PIC Edge/Level
> Configuration Registers (ELCR), so rename it as such and mentally
> decouple it from the long since dead EISA bus.
> 
> Cc: Thomas Gleixner <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: "H. Peter Anvin" <[email protected]>
> Cc: [email protected]
> Cc: "Rafael J. Wysocki" <[email protected]>
> Cc: Len Brown <[email protected]>
> Cc: Pavel Machek <[email protected]>
> Cc: Bjorn Helgaas <[email protected]>
> Signed-off-by: Paul Gortmaker <[email protected]>
> ---
> 
> [This was in the "delete EISA bus supoort for x86" series, but since
>  we aren't going to apply that, we might as well steal this from it.]

Reviewed-by: Maciej W. Rozycki <[email protected]>

 FWIW it looks good to me, thanks.  Especially for reusing the good parts 
of your original change. :)

 While cleaning this stuff up you might as well consider getting rid of 
the embedded numeric 0x4d0 port reference too and adding macros like 
PIC_MASTER_ELCR and PIC_SLAVE_ELCR to <asm/i8259.h> to use them...

> diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
> index 5dc6ca5e1741..9bd115484745 100644
> --- a/arch/x86/pci/irq.c
> +++ b/arch/x86/pci/irq.c
> @@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)
>  
>  /*
>   *  Code for querying and setting of IRQ routes on various interrupt routers.
> + *  PIC Edge/Level Control Registers (ELCR) 0x4d0 & 0x4d1.
>   */
>  
> -void eisa_set_level_irq(unsigned int irq)
> +void elcr_set_level_irq(unsigned int irq)
>  {
>       unsigned char mask = 1 << (irq & 7);
>       unsigned int port = 0x4d0 + (irq >> 3);

... here, and a bunch of places elsewhere.  Your change is of course good 
as it stands though, that would have to be a separate clean-up anyway.

  Maciej
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