The jz4740-cgu driver already has access to the CGU, so it makes sense
to move the few remaining accesses to the CGU from arch/mips/jz4740
there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions
there for such consistency.Signed-off-by: Paul Burton <[email protected]> Cc: Lars-Peter Clausen <[email protected]> Cc: Mike Turquette <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: [email protected] Cc: [email protected] --- Changes in v5: None Changes in v4: None Changes in v3: - Rebase. Changes in v2: None arch/mips/jz4740/clock.c | 13 ------------- drivers/clk/ingenic/jz4740-cgu.c | 22 ++++++++++++++++++++++ 2 files changed, 22 insertions(+), 13 deletions(-) diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c index 90b44d7..2a10829 100644 --- a/arch/mips/jz4740/clock.c +++ b/arch/mips/jz4740/clock.c @@ -33,7 +33,6 @@ #define JZ_CLOCK_GATE_UART0 BIT(0) #define JZ_CLOCK_GATE_TCU BIT(1) -#define JZ_CLOCK_GATE_UDC BIT(11) #define JZ_CLOCK_GATE_DMAC BIT(12) #define JZ_CLOCK_PLL_STABLE BIT(10) @@ -64,18 +63,6 @@ static void jz_clk_reg_clear_bits(int reg, uint32_t mask) writel(val, jz_clock_base + reg); } -void jz4740_clock_udc_disable_auto_suspend(void) -{ - jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC); -} -EXPORT_SYMBOL_GPL(jz4740_clock_udc_disable_auto_suspend); - -void jz4740_clock_udc_enable_auto_suspend(void) -{ - jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC); -} -EXPORT_SYMBOL_GPL(jz4740_clock_udc_enable_auto_suspend); - void jz4740_clock_suspend(void) { jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, diff --git a/drivers/clk/ingenic/jz4740-cgu.c b/drivers/clk/ingenic/jz4740-cgu.c index 0209ed6..0e692ed 100644 --- a/drivers/clk/ingenic/jz4740-cgu.c +++ b/drivers/clk/ingenic/jz4740-cgu.c @@ -26,6 +26,7 @@ #define CGU_REG_CPCCR 0x00 #define CGU_REG_LCR 0x04 #define CGU_REG_CPPCR 0x10 +#define CGU_REG_CLKGR 0x20 #define CGU_REG_SCR 0x24 #define CGU_REG_I2SCDR 0x60 #define CGU_REG_LPCDR 0x64 @@ -47,6 +48,9 @@ /* bits within the LCR register */ #define LCR_SLEEP (1 << 0) +/* bits within the CLKGR register */ +#define CLKGR_UDC (1 << 11) + static struct ingenic_cgu *cgu; static const s8 pll_od_encoding[4] = { @@ -242,3 +246,21 @@ void jz4740_clock_set_wait_mode(enum jz4740_wait_mode mode) writel(lcr, cgu->base + CGU_REG_LCR); } + +void jz4740_clock_udc_disable_auto_suspend(void) +{ + uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); + + clkgr &= ~CLKGR_UDC; + writel(clkgr, cgu->base + CGU_REG_CLKGR); +} +EXPORT_SYMBOL_GPL(jz4740_clock_udc_disable_auto_suspend); + +void jz4740_clock_udc_enable_auto_suspend(void) +{ + uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); + + clkgr |= CLKGR_UDC; + writel(clkgr, cgu->base + CGU_REG_CLKGR); +} +EXPORT_SYMBOL_GPL(jz4740_clock_udc_enable_auto_suspend); -- 2.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
