This patch writes into bit 8 of the reload register to perform the
correct 'Reload Sequence' instead of writing into bit 4 of Watchdog for
Intel 6300ESB chipset.
Signed-off-by: Naveen Gupta <[EMAIL PROTECTED]>
Index: linux-2.6.12/drivers/char/watchdog/i6300esb.c
===================================================================
--- linux-2.6.12.orig/drivers/char/watchdog/i6300esb.c 2005-08-15
11:21:35.000000000 -0700
+++ linux-2.6.12/drivers/char/watchdog/i6300esb.c 2005-08-15
11:28:07.000000000 -0700
@@ -109,7 +109,7 @@
spin_lock(&esb_lock);
/* First, reset timers as suggested by the docs */
esb_unlock_registers();
- writew(0x10, ESB_RELOAD_REG);
+ writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
/* Then disable the WDT */
pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
@@ -123,7 +123,7 @@
{
spin_lock(&esb_lock);
esb_unlock_registers();
- writew(0x10, ESB_RELOAD_REG);
+ writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
/* FIXME: Do we need to flush anything here? */
spin_unlock(&esb_lock);
}
@@ -153,7 +153,7 @@
/* Reload */
esb_unlock_registers();
- writew(0x10, ESB_RELOAD_REG);
+ writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
/* FIXME: Do we need to flush everything out? */
Index: linux-2.6.12/drivers/char/watchdog/i6300esb.h
===================================================================
--- linux-2.6.12.orig/drivers/char/watchdog/i6300esb.h 2005-08-15
11:19:01.000000000 -0700
+++ linux-2.6.12/drivers/char/watchdog/i6300esb.h 2005-08-15
11:26:58.000000000 -0700
@@ -54,6 +54,8 @@
#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
+/* Reload register bits */
+#define ESB_WDT_RELOAD ( 0x01 << 8 ) /* prevent timeout */
/*
* Some magic constants
-
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