On Wed, 17 Jun 2015, Andy Lutomirski wrote:
> On Thu, Jun 11, 2015 at 2:19 PM, Dan Williams <dan.j.willi...@intel.com>
> wrote:
> > +static inline void arch_sync_pmem(void)
> > +{
> > + wmb();
> > + pcommit_sfence();
> > +}
>
> This function is non-intuitive to me. It's really "arch-specific sync
> pmem after one or more copies using arch_memcpy_to_pmem". If normal
> stores or memcpy to non-WC memory is used instead, then it's
> insufficient if the memory is WB and it's unnecessarily slow if the
> memory is WT or UC (the first sfence isn't needed).
>
> I would change the name and add documentation. I'd also add a comment
> about the wmb() being an SFENCE to flush pending non-temporal writes.
Not "I'd also add ...".
Documentation of memory barriers are mandatory.
Thanks,
tglx
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