On 06/26/2015 04:05 AM, Hai Li wrote:
Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.
Tested-by: Archit Taneja <arch...@codeaurora.org>
Signed-off-by: Hai Li <h...@codeaurora.org>
---
drivers/clk/qcom/clk-rcg2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 4d3e2f7..b344899 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -615,10 +615,11 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned
long rate,
if (!parent)
return -EINVAL;
+ src_rate = parent_rate;
+
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
- src_rate = __clk_round_rate(parent, request);
if ((src_rate < (request - delta)) ||
(src_rate > (request + delta)))
continue;
--
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