On Thu, Jul 02, 2015 at 10:48:32AM +0530, Lokesh Vutla wrote: > AES_CTRL_REG is used to configure AES mode. Before configuring > any mode we need to make sure all other modes are reset or else > driver will misbehave. So mask all modes before configuring > any AES mode. > > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com> > --- > drivers/crypto/omap-aes.c | 13 +++++-------- > 1 file changed, 5 insertions(+), 8 deletions(-) > > diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c > index a923101..96fc7f7 100644 > --- a/drivers/crypto/omap-aes.c > +++ b/drivers/crypto/omap-aes.c > @@ -63,6 +63,7 @@ > #define AES_REG_CTRL_DIRECTION (1 << 2) > #define AES_REG_CTRL_INPUT_READY (1 << 1) > #define AES_REG_CTRL_OUTPUT_READY (1 << 0) > +#define AES_REG_CTRL_MASK FLD_MASK(24, 2)
you end up masking bits which aren't even defined in this driver. What are those bits ? Perhaps add macros for them and define AES_REG_CTRL_MASK by explicitly ORing those macros ? That would, at least, be clearer -- balbi
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