On Fri, Aug 07, 2015 at 03:53:30PM -0400, Wei Huang wrote:
> According to AMD programmer's manual, AMD PERFCTRn is 64-bit MSR which,
> unlike Intel perf counters, doesn't require signed extension. This
> patch removes the unnecessary conversion in SVM vPMU code when PERFCTRn
> is being updated.
>
> Signed-off-by: Wei Huang <w...@redhat.com>
> ---
> arch/x86/kvm/pmu_amd.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/x86/kvm/pmu_amd.c b/arch/x86/kvm/pmu_amd.c
> index 886aa25..39b9112 100644
> --- a/arch/x86/kvm/pmu_amd.c
> +++ b/arch/x86/kvm/pmu_amd.c
> @@ -133,8 +133,6 @@ static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struct
> msr_data *msr_info)
> /* MSR_K7_PERFCTRn */
> pmc = get_gp_pmc(pmu, msr, MSR_K7_PERFCTR0);
> if (pmc) {
> - if (!msr_info->host_initiated)
> - data = (s64)data;
> pmc->counter += data - pmc_read_counter(pmc);
> return 0;
> }
> --
> 1.8.3.1
Reviewed-by: Andrew Jones <drjo...@redhat.com>
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