Why have you sent this set 3 times?
> IRQ control registers of Intel Broxton Whisky Cove PMIC are
> separated in two parts, so add secondary IRQ chip.
> And the new member of device will be used in PMC IPC regmap APIs.
>
> Signed-off-by: Qipeng Zha <qipeng....@intel.com>
> ---
> include/linux/mfd/intel_soc_pmic.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/linux/mfd/intel_soc_pmic.h
> b/include/linux/mfd/intel_soc_pmic.h
> index abcbfcf..a730f14 100644
> --- a/include/linux/mfd/intel_soc_pmic.h
> +++ b/include/linux/mfd/intel_soc_pmic.h
> @@ -21,10 +21,15 @@
>
> #include <linux/regmap.h>
>
> +#define INIT_REGMAP_IRQ(_irq, _off, _mask) \
> + [_irq] = { .reg_offset = (_off), .mask = (_mask) }
> +
> struct intel_soc_pmic {
> int irq;
> struct regmap *regmap;
> struct regmap_irq_chip_data *irq_chip_data;
> + struct regmap_irq_chip_data *irq_chip_data_level2;
> + struct device *dev;
> };
>
> #endif /* __INTEL_SOC_PMIC_H__ */
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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