Hi Vinod,
> -----Original Message-----
> From: [email protected] [mailto:dmaengine-
> [email protected]] On Behalf Of Koul, Vinod
> Sent: Monday, October 05, 2015 7:40 PM
> To: Appana Durga Kedareswara Rao
> Cc: [email protected]; Anirudha Sarangi; Michal Simek; Williams,
> Dan
> J; Soren Brinkmann; [email protected]; linux-arm-
> [email protected]; [email protected]
> Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory
> Access Engine driver support
>
> On Mon, 2015-10-05 at 13:50 +0000, Appana Durga Kedareswara Rao wrote:
>
> > >
> > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana
> wrote:
> > > > This is the driver for the AXI Central Direct Memory Access (AXI
> > > > CDMA) core, which is a soft Xilinx IP core that provides
> > > > high-bandwidth Direct Memory Access (DMA) between a memory-mapped
> > > > source address and a memory-mapped destination address.
> > >
> > > Where is the 1/2 here ? I have only this one in my mails..
> >
> > You are there in the 1/2 not the [email protected].
>
> The threading is broken in your patch series. ON searching I found the 1/2.
> Please make sure patch series are threaded properly.
>
Sorry for the noise will take care from the next series onwards.
Regards,
Kedar.
> --
> ~Vinod
> N r y b X ǧv ^ ){.n + )ފ{ay ʇڙ ,j f h z w j:+v
> w j m zZ+ ݢj" !
> i
N�����r��y����b�X��ǧv�^�){.n�+����{����zX����ܨ}���Ơz�&j:+v�������zZ+��+zf���h���~����i���z��w���?�����&�)ߢf��^jǫy�m��@A�a���
0��h���i