[PATCH v8 27/38] kselftest/arm64: Verify the GCS hwcap

[Mark Brown]

Add coverage of the GCS hwcap to the hwcap selftest, using a read of
GCSPR_EL0 to generate SIGILL without having to worry about enabling GCS.

Signed-off-by: Mark Brown <broo...@kernel.org>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c 
b/tools/testing/selftests/arm64/abi/hwcap.c
index 1189e77c8152..bc9e3250a9df 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -63,6 +63,17 @@ static void fp_sigill(void)
        asm volatile("fmov s0, #1");
 }
 
+static void gcs_sigill(void)
+{
+       unsigned long *gcspr;
+
+       asm volatile(
+               "mrs    %0, S3_3_C2_C5_1"
+       : "=r" (gcspr)
+       :
+       : "cc");
+}
+
 static void ilrcpc_sigill(void)
 {
        /* LDAPUR W0, [SP, #8] */
@@ -360,6 +371,14 @@ static const struct hwcap_data {
                .cpuinfo = "fp",
                .sigill_fn = fp_sigill,
        },
+       {
+               .name = "GCS",
+               .at_hwcap = AT_HWCAP2,
+               .hwcap_bit = HWCAP2_GCS,
+               .cpuinfo = "gcs",
+               .sigill_fn = gcs_sigill,
+               .sigill_reliable = true,
+       },
        {
                .name = "JSCVT",
                .at_hwcap = AT_HWCAP,

-- 
2.30.2