Puranjay Mohan <puran...@kernel.org> writes: > When LSE atomics are available, BPF atomic instructions are implemented > as single ARM64 atomic instructions, therefore it is easy to enable > these in bpf_arena using the currently available exception handling > setup. > > LL_SC atomics use loops and therefore would need more work to enable in > bpf_arena. > > Enable LSE atomics based instructions in bpf_arena and use the > bpf_jit_supports_insn() callback to reject atomics in bpf_arena if LSE > atomics are not available. > > All atomics and arena_atomics selftests are passing: > > [root@ip-172-31-2-216 bpf]# ./test_progs -a atomics,arena_atomics > #3/1 arena_atomics/add:OK > #3/2 arena_atomics/sub:OK > #3/3 arena_atomics/and:OK > #3/4 arena_atomics/or:OK > #3/5 arena_atomics/xor:OK > #3/6 arena_atomics/cmpxchg:OK > #3/7 arena_atomics/xchg:OK > #3 arena_atomics:OK > #10/1 atomics/add:OK > #10/2 atomics/sub:OK > #10/3 atomics/and:OK > #10/4 atomics/or:OK > #10/5 atomics/xor:OK > #10/6 atomics/cmpxchg:OK > #10/7 atomics/xchg:OK > #10 atomics:OK > Summary: 2/14 PASSED, 0 SKIPPED, 0 FAILED
Gentle ping about this, Thanks, Puranjay
