The tools/include readl/writel MMIO accessors on arm64 use inner-shareable barriers (dmb ish) while the kernel uses outer-shareable (dmb osh). Fix them to match.
Add __io_bw() and __io_ar() definitions matching the kernel's arch/arm64/include/asm/io.h, including the dummy control dependency in __io_ar() that orders MMIO reads against all subsequent instructions. Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Jason Gunthorpe <[email protected]> --- tools/arch/arm64/include/asm/barrier.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/arch/arm64/include/asm/barrier.h b/tools/arch/arm64/include/asm/barrier.h index abdc64fc3c70f0..3f7fcb2a27541e 100644 --- a/tools/arch/arm64/include/asm/barrier.h +++ b/tools/arch/arm64/include/asm/barrier.h @@ -28,6 +28,20 @@ #define dma_rmb() asm volatile("dmb oshld" ::: "memory") #define dma_wmb() asm volatile("dmb oshst" ::: "memory") +/* Match arch/arm64/include/asm/io.h: use osh barriers for device MMIO */ +#define __io_bw() dma_wmb() +#define __io_ar(v) \ +({ \ + unsigned long tmp; \ + \ + dma_rmb(); \ + \ + asm volatile("eor %0, %1, %1\n" \ + "cbnz %0, ." \ + : "=r" (tmp) : "r" ((unsigned long)(v)) \ + : "memory"); \ +}) + #define smp_store_release(p, v) \ do { \ union { typeof(*p) __val; char __c[1]; } __u = \ -- 2.43.0
