Guennadi Liakhovetski <[email protected]> writes:
> (moved to the new v4l list)
>
>> The DMA transfers in pxa_camera showed some weaknesses in
>> multiple queued buffers context :
>> - poll/select problem
>> The order between list pcdev->capture and DMA chain was
>> not the same. This creates a discrepancy between video
>> buffers marked as "done" by the IRQ handler, and the
>> really finished video buffer.
>
> Could you please describe where and how the order could get wrong?
Sorry, I missed that point in the previous reply.
It's still the same bit of code :
- } else {
- buf_dma->sg_cpu[nents].ddadr =
- DDADR(pcdev->dma_chans[i]);
That chains the end of the queued buffer to the active buffer (probably the one
running in DMA chain [1]). So we'll get images in the following order:
<queued_buffer>, then <active_buffer (head of pcdev->capture)>, then <others>.
The desired order is :
<active_buffer (head of pcdev->capture)>, then <others>, then <queued_buffer>.
>> - multiple buffers DMA starting
>> When multiple buffers were queued, the DMA channels were
>
> You mean multiple scatter-gather elements?
No, I mean multiple video buffers.
Multiple scatter-gather elements form one video buffer, and multiple video
buffers are queued to form a list of images (video stream).
Cheers.
--
Robert
[1] I mean _probably_, because the DMA chain can be already ahead of 1 buffer
(we're talking in terms of PXA cycles, which is very hard to watch), while
active pointer is not yet updated.
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